Site Outline

 Research Interests:

The main focus of VTVT Group is low-power VLSI system design for next generation wireless communications. The group is currently developing ultra wideband (UWB)) systems, reconfigurable modems for the next generation wireless communications, a low-power VLSI system for low-bit rate wireless video and is working on a low-power VLSI system design for handset smart antennas. The group is also developing various building blocks for wireless communications (such as turbo and Viterbi decoders, low-power analog-to-digital converters, a SRAM generator) and low-power library cells to support low-power VLSI system designs.

• VLSI design for wireless communications and digital signal processing
  • Low-power VLSI system design
  • Analog and mixed-signal VLSI design
  • Embedded systems
  • Wireless sensors
  • Reconfigurable computing
  • RF ICs
  • Ultra wideband (UWB) systems
  • Low-power library cells

 Research Projects:

There are major on-going research projects as described below. The major sponsors of the research projects include Advantest Laboratories, Ltd., Bell Labs of Lucent Technologies, Electronics and Telecommunications Research Institute (ETRI),  the National Science Foundation, Samsung Electronics, Virginia Tech Institute for Critical Technology and Applied Science (ICTAS), and Virginia Tech ASPIRES program.
 

• Ultra Wideband (UWB) System Design:
  Overview slides:
  UWB has drawn phenomenal interest from industry, military as well as academia recently. We are investigating possible means for energy efficient smart UWB systems for communications and radar applications. More specifically, our research focuses on low-power CMOS UWB radios for high data rate complying the FCC regulations, UWB radios for RF IDs and low data rate applications, energy efficient wireless ad hoc and sensor networks, and accurate UWB ranging for asset location and wireless sensor networks.

• Low-Power VLSI System Design for Low-Bit Rate Wireless Video:
  
  Overview slides:
  Low-bit rate wireless video communications systems can be used for cellular phones, surveillance, and mobile patrol. A major problem for wireless video is high power dissipation due to complex processing. Currently, we are developing a low-power VLSI system for real-time low-bit rate wireless video communications.

The codec (encoder/decoder) for our video system is based on ITU Recommendation H.263, "Video Coding for Low Bit Rate Communications," but the codec employs several algorithms such as motion estimation developed by us. We are investigating low-power design of major algorithms for the codec. A prototype for our video system currently runs on the PCs. We plan to port the system to FPGA boards first and then implement it in low-power ASICs. This project is in collaboration with the multimedia compression team of Korea University, Korea.

Current Prototype - Demo Video (12 MB)

Bandwidth: less than 20 kbps
Frame rate: 5-7 frames per second

• Development of a VLSI system for smart antenna for handsets:
  
  Overview slides:
  Temporal diversity in wireless communications exploits the time-dispersed multipath, while spatial diversity exploits the difference in paths and polarization of the multipath. Although time/space diversity is a promising method to increase the capacity and range of wireless systems, it has not been exploited in handsets for two reasons; 1) only recently have we shown, at Virginia Tech, that multiple antennas closely spaced on a handset can in fact achieve a high diversity gain, and 2) exploiting time and space processing jointly requires high computing power and may result in a large amount of power dissipation.

<![if !vml]><![endif]>We are investigating a VLSI system which exploits spatial diversity such as smart antenna for handsets. In order to be applicable to handsets, our system should dissipate a small amount of power, and it will also be integrated on a single CMOS chip. To reduce power dissipation, our system dynamically reconfigures itself to adapt to the channel condition. Our research plan incorporates system-level designs using SPW of Cadence and tradeoffs followed by development of reconfigurable building blocks. The research is in collaboration of the Antenna Group (directed by Prof. Warren Stutzman) and the DSP group (directed by Prof. Jeff Reed) of MPRG at Virginia Tech.
 

• Development of Building Blocks for Wireless Communications:
  We have developed several building blocks for wireless communications. The building blocks should dissipate a small amount of power, so that they can be employed for portable devices. The building blocks which have been implemented are listed below.
  • Turbo decoder: Abstract, Overview Slides
  • Viterbi decoder: Abstract, Overview Slides Die Photo
  • Correlator: Abstract, Overview Slides
  • 12-bit analog-to-digital converter: Abstract, Overview Slides
  • SRAM generator: Abstract, Overview Slides

Among the designs, the Viterbi decoder was fabricated in 0.6 um CMOS and its functionality was tested. Currently, we are developing major blocks for the codec of our wireless video system and plan to develop blocks for smart antennas for handsets.
 

• Development of Low-Power Library Cells:
  
  Overview slides
  The design flow adopted at VTVT group is that a design is described at the behavioral level in VHDL first and then gate level circuit is obtained through logic synthesis. Synopsys tools are used for VHDL simulation and logic synthesis. The gate level circuit is ported into Cadence design environment for placement and routing and layout generation. SPICE simulation is performed using HSPICE for the netlist extracted from a layout. Currently, VTVT group supports TSMC 0.25 um, 0.18 um, and 0.13 um for CMOS technologies, and chips are fabricated through MOSIS.

The performance of VLSI systems is sensitive to the library cells employed. We are investigating tools and methodologies for development low-power library cells for 0.25 um CMOS technology. Library cells to be developed include macro cells as well as primitive cells.

 VTVT Members:

• Current Members:
       Currently VTVT group has 11 student researchers.  They are dedicated and hard working individuals, who are determined to conduct high quality research in their areas.

Name	Email	Level	Research Topic
Nathaniel August	nateaugu@vt.edu	Ph.D. Student	Energy Efficient Wireless Ad Hoc and Sensor Network
Woo Cheol Chung	woochung@vt.edu	Ph.D. Student	Signaling for High-Speed Inter- and Intra-Chip Interconnect
Sajay Jose	sjose@vt.edu	M.S. Student	RFIC Design - UWB Power Amplifiers
Sweta Kalantri		M.S. Student	CMOS UWB Design
Jina Kim	jnkim@vt.edu	Ph.D. Student	Reconfigurable Modem
Hyung-Jin Lee	hlee@vt.edu	Ph.D. Student	CMOS UWB Radio Design
Jong Suk Lee	watsup@vt.edu	Ph.D. Student	Reconfigurable Parallel Architecture
Jonathan Perry	joperry2@vt.edu	M.S. Student	Nanotechnology
Jos Sulistyo	jsulisty@vt.edu	Ph.D. Student	Low Power Library Cells/ High-Speed Multiplier
Rajesh Thirugnanam	thirugnr@vt.edu	Ph.D. Student	High-Speed Low Power Folding ADCs
Shen Wang	shwang@vt.edu	Ph.D. Student	High-Speed Frequency Synthesizer and DAC Design

• Recent Members:
       Total of 14 students from VTVT group graduated in the past four years. Most of them are working for US companies in VLSI design and test area.

 Recent Publications:

• Ultra Wideband Research:
  System design, UWB circuit design,
• Wireless Communications
  Smart antennas, rake recivers, channel decoders, etc.
• High-Speed, Low-Power Circuit Design
  Arithmetic circuits, video processing circuits, ADCs, RAM compiler, etc.
• Video Code and Data Compression
  Image, and test data
• Testing and Various Topics
  Testing, power secuirty, library cells, etc.

 Distribution of Standard Library Cells and CAD Tools for Testing:<![if !supportNestedAnchors]><![endif]>

The VTVT Group has developed and distribute a standard-cell library targeting the TSMC-0.25um, 2.5-volt CMOS process available via MOSIS. The library can be used with Synopsys synthesis tools and the place/route tool of Cadence. We also have developed CAD tools for testing (two automatic test pattern generators and two fault simulators) and distribute the source code for the tools. The library cells and the CAD tools are free of charge to universities and not-for-profit research institutios. Companies can reeceive them by joining industry affiliates program.

 Indusry Affiliates Program:

To foster interactions with industry and to better serve its needs, VISC (Virginia Tech Information Systems Center) has been formed in 1995.  Industrial Affiliates Program of VISC provides a means for VISC researchers to rapidly transfer new ideas, inventions, and technologies to industry, thus enabling our industrial partners to benefit from VISC ís expertise and continuing research. This transfer is accomplished through funded research, enhanced access to students, interaction with faculty and students, seminars and short courses, shared software, and technical reports.

Collaboration would be initiated via the identification of a project in the VTVT research area. Projects may be exploratory or high risk, so that they can be performed most efficiently at a university research center. Membership is available in two levels, Silver Level and Gold Level. A Sliver membership can access non-proprietary software, technical documentations, and VISC facilities. In addition to all the benefits of Silver Membership, each Gold Membership supports a graduate student in his or her research for one year. The membership fee is $5,000 per year for Silver membership and $30,000 per year for Gold membership.

 Associated Research Centers:<![if !supportNestedAnchors]><![endif]>

VTVT group and its laboratory belong to VISC. Dong Ha is a full member of VISC and an affiliates member of MPRG. VTVT group closely collaborates with MPRG faculty and students in research on wireless communications.
 

·  Virginia Tech Information Systems Center (VISC)	Director
·  Mobile and Portable Radio Research Group (MPRG)	Affiliated Member
·  Center for Wireless Communications	Affiliated Member

 Picture Gallery:<![if !supportNestedAnchors]><![endif]>

  Click on a thumbnail to see a bigger picture !!

Research Interests    Research Projects    Members  PublicationsCAD Tools for Testing  Industry Affiliates ProgramAssociated Research Centers   Picture Gallery

  

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Comments to: ha@vt.edu
Last Updated: October 22, 2004
http://www.ee.vt.edu/~ha/research.html