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<![if !vml]><![endif]>JOHN P. HAYES

Claude E. Shannon Professor of Engineering Science

Department of Electrical Engineering and Computer Science
EECS Bldg. Room 2114E
University of Michigan
1301 Beal Avenue
Ann Arbor, MI 48109-2122, USA.

Telephone: +1 (734) 763-0386
Fax: +1 (734) 763-4617
E-mail: jhayes@eecs.umich.edu

BACKGROUND

Since 1982, John P. Hayes has been a professor in the EECS Department at the University of Michigan, where he holds the Claude E. Shannon Chair of Engineering Science.  Prior to that he was on the faculty of the University of Southern California. He also worked in industry for several years, and has held visiting positions at Stanford University, McGill University, and the Universite de Montreal. Professor Hayes teaches and conducts research in the general area of computer science and engineering, with specific interests in computer hardware design, quantum computing, computer-aided design, testing, and verification of digital systems, VLSI design, and fault-tolerant and embedded computer systems. He was the founding director of Michigan's Advanced Computer Architecture Laboratory. He is the author of several books including Computer Architecture and Organization, (McGraw-Hill, 3rd ed. 1998), Layout Minimization for CMOS Cells, (Kluwer, 1992), and Introduction to Digital Logic Design, (Addison-Wesley, 1993), as well as numerous technical papers. He received the B.E. degree from the National University of Ireland, Dublin and his M.S. and Ph.D. degrees from the University of Illinois, Urbana-Champaign. He received the University of Michigan’s Distinguished Faculty Award in 1999 and the Humboldt Research Award in 2004. Professor Hayes is a Fellow of both IEEE and ACM.

RESEARCH

   Our group is currently conducting research on the following topics:

* Quantum computer circuit synthesis, simulation and testing

* Embedded computer systems and ad hoc networks for various applications

* Design of circuits and systems for low-power applications

* Computer architectures for safety-critical systems

* Design, verification and testing of systems-on-a-chip (SOCs)

   Openings for graduate and (less often) undergraduate student research assistants (RA's) are available from time to time.  RA applicants should normally be already enrolled in one of the EECS Department's degree programs.  For general information on Michigan's various MS and PhD programs in EECS, or to request application materials for admission and financial aid, go to the EECS Graduate Admissions web site. For more information on our group's research interests, see below.

   For information concerning the high-level versions of the ISCAS benchmark circuits developed by our group circa 1996, go to the high-level benchmark circuits website.

SELECTED PUBLICATIONS

   For a flavor of the research being conducted in our lab, see the following documents which you can download in pdf format:

1. J. P. Hayes, “Tutorial: basic concepts in quantum circuits,” These are the slides of a talk presented at the 40^th Design Automation Conf, Anaheim, CA, June 2003.  Quantum information science is a revolutionary new way to compute and communicate that has great long-term potential. (pdf).  For additional information, go to the University of Michigan’s Quantum Circuits Group website here.
2. B. T. Murray and J. P. Hayes, “Testing ICs: getting to the core of the problem,” IEEE Computer, vol. 29, no. 11, pp.32– 38, Nov. 1996.  This is a short tutorial discussion of the problems of testing integrated circuits. (pdf).
3. K.N. Patel, J.P. Hayes and I. Markov, “Fault testing for reversible circuits,” Proc. VLSI Test Symp. (VTS 03), Napa, CA, pp. 410–416, April 2003.  This paper discusses the testing of an unusual class of circuits motivated by quantum computing. (pdf)
4. V.V. Shende, A.K. Prasad, I.L Markov and J.P. Hayes, “Synthesis of reversible logic circuits,” IEEE Trans. on CAD, vol. 22, pp. 710–722, June 2003. (pdf)
5. F. Gao and J.P. Hayes, “ILP-based optimization of sequential circuits for low power,” Proc. Intl. Symp. on Low Power Electronics and Design (ISPLED 03), Seoul, South Korea, Aug. 2003. (pdf)
6. N. Kandasamy, J. P. Hayes and B.T. Mur­ray “Dependable communication synthesis for distributed embedded systems,” Proc. 22nd Int’l Conf. on Computer Safety, Reliability and Security (SAFECOMP 2003), Edinburgh, UK, Sept. 2003. (pdf)

CURRENT GRADUATE STUDENTS

   Srikanth Balaji  (balbrain@eecs.umich.edu)

   Jia-yi Chen (jiayi@eecs.umich.edu)

   Sungsoon Cho (sungcho@eecs.umich.edu)

   Feng Gao (fgao@eecs.umich.edu)

   Smita Krishnaswamy (smita@eecs.umich.edu)

   Rajesh Venkatasubramanian (vrajesh@eecs.umich.edu)

   George Viamontes (gviamont@eecs.umich.edu)

RECENTLY GRADUATED Ph.D. STUDENTS

   Hussain Al-Asaad (halasaad@ece.ucdavis.edu)

Graduated 1998. Thesis title: "Lifetime validation of digital systems via fault modeling and test generation."

Current position: University of California, Davis, CA

   Nagarajan Kandasamy (nagarajan.kandasamy@vanderbilt.edu)

Graduated 2003. Thesis title: "Design of low-cost dependable systems for distributed embedded applications."

Current position: Vanderbilt University, Nashville, TN

   Hyungwon (Will) Kim (hyungwonkim@yahoo.com)

Graduated 1999. Thesis title: "Test and synthesis of systems-on-a-chip with unimplemented blocks."

Current position: Broadcom Inc., San Jose, CA

   Joonhwan Yi (joonhwan.yi@samsung.com)

Graduated 2002. Thesis title: " High-level functional and delay testing for digital circuits."

Current position: Samsung Telecommunication Research, S. Korea

And not quite so recently:

Ayee Goundan, Thirumalai Sridhar, John P. Shen, Raif M. Yanney, M. S. Krishnan, Younggap You, Debashis Bhattacharya, Shantanu Dutt, Robert L. Maziasz, T. C. Lee, Ram Raghavan, Brian T. Murray, R. D. (Shawn) Blanton, Hung-Kuei Ku, Michael J. Batek,  Krish Chakrabarty,  Mark Hansen, Avaneendra Gupta, Amit Chowdhary, Hakan Yalcin.