G. F. Viamontes, M. Rajagopalan, I. L. Markov, J. P. Hayes, ``Gate-Level Simulation of Quantum Circuits,'' In Proc. of the Asia South Pacific Design Automation Conference, pp. 295-301, January 2003. (PDF) (PS)
G. F. Viamontes, M. Rajagapolan, I. L. Markov and J. P. Hayes, `` High-Performance Simulation of Quantum Computation Using QuIDDs,'' 6th Intl. Conf. on Quantum Communication, Measurement and Computing (QCMC), July 2002.
Synthesis of Quantum and Classical Reversible Circuits
S. S. Bullock and I. L. Markov, `` An Arbitrary Two-qubit Computation In 23 Elementary Gates,'' Proc. ACM/IEEE Design Automation Conf. (DAC), pp. 324-329, Anaheim, CA, June 2003 (BPA nominee). Journal version in APS Physical Review A (012318), vol. 68, no. 1, July 2003.
J. P. Hayes, I. Polian and B. Becker, ``Testing for Missing-gate Faults in Reversible Circuits'', to appear in Proc. Asian Test Symposium, Taiwain, November 2004.