GSRC    Bookshelf

FastPlace: An Analytical Placer for Large-scale VLSI Circuits

Natarajan Viswanathan , Min Pan , Chris Chu Last updated: Apr 08, 2007

Contents

I.	Introduction
II.	Features
III.	Limitations
IV.	Performance Results
V.	Executables
VI.	Literature

• The Global Placement stage solves the quadratic objective function and uses the techniques of Cell Shifting and Iterative Local Refinement for spreading.

• The Legalization stage uses a sequence-pair based floorplanning algorithm for macro-block legalization and a robust segment-based standard-cell legalizer.

• The Detailed Placement stage uses the techniques of Global Swap, Vertical Swap, Local Cell Re-ordering and Single-segment Clustering for further wirelength improvement.

• Can handle placement-blockages / fixed-macros

• Can handle placement congestion constraints (eg. ISPD-2006 placement contest benchmarks)

• Can perform net-weighting (weights for nets need to be specified in the .wts file)

• Incorporates a multilevel global placement framework to improve scalability

• Incorporates a stand-alone legalizer for mixed-size circuits

• Incorporates a stand-alone detailed placer that can also handle placement blockages

• Can handle arbitrary number of row-blockages (as specified in the .scl file)

• Incorporates a Hybrid Net Model to speed-up the quadratic program solver

• Fast: Can place circuits with over 2 million components in less than 90 minutes on a 2.5GHZ AMD Opteron 252 machine

• Cannot handle irregular row-spacing and row-width (eg. Bookshelf Format MCNC benchmarks released by Dr. Patrick Madden).

• Needs connectivity information between movable cells and I/O pads at the placement boundary.

• Can only handle GSRC Bookshelf format and cannot handle LEF/DEF format

Recent performance results on various benchmarks are documented in References [1] - [3] under the literature section.

FastPlace Binaries	(Linux 32-bit and 64-bit)
FastPlace Usage	(Usage and command-line options)

 Default usage for most benchmarks:

   FastPlace3.0_Linux_GP <benchmark_dir> <aux_file> <output_dir>
   FastPlace3.0_Linux_DP -legalize <benchmark_dir> <aux_file> <input_dir> <input_fileName>

[1]	Natarajan Viswanathan, Min Pan and Chris Chu, FastPlace 3.0: A Fast Multilevel Quadratic Placement Algorithm with Placement Congestion Control. In Proc. Asia and South Pacific Design Automation Conference, pages 135-140, 2007.
[2]	Natarajan Viswanathan, Min Pan and Chris Chu, FastPlace 2.0: An Efficient Analytical Placer for Mixed-Mode Designs. In Proc. Asia and South Pacific Design Automation Conference, pages 195-200, 2006.
[3]	Min Pan, Natarajan Viswanathan and Chris Chu, An Efficient and Effective Detailed Placement Algorithm. In Proc. IEEE/ACM International Conference on Computer-Aided Design, pages 48-55, 2005.
[4]	Natarajan Viswanathan and Chris Chong-Nuen Chu, FastPlace: Efficient Analytical Placement using Cell Shifting, Iterative Local Refinement and a Hybrid Net Model. IEEE Transactions Computer-Aided Design, 24(5):722-733, 2005.
[5]	Natarajan Viswanathan and Chris Chong-Nuen Chu, FastPlace: Efficient Analytical Placement using Cell Shifting, Iterative Local Refinement and a Hybrid Net Model. In Proc. International Symposium on Physical Design, pages 26-33, 2004.