VPR is a placement and routing tool for array-based FPGAs, and T-VPack is a logic block packing (clustering) program. VPR was written to allow circuits to be placed and routed on a wide variety of FPGAs to facilitate comparisons of different architectures. It takes two input files, a netlist describing the circuit to be placed and routed, and a description of the FPGA architecture. Optionally, one can also input a placement file to VPR if one desires that an existing placement be routed only.
At the University of Toronto, our typical CAD flow consists of using SIS to logic-optimize and technology map a circuit, T-VPack to pack LUTs and flip flops together into larger logic blocks, and VPR to place and route the circuit. In terms of routing area, VPR outperforms all other academic placement and routing packages to which we've been able to compare. The combination of T-VPack and VPR is now fully timing-driven from start to finish (timing-driven clustering, placement and routing). VPR also includes a full timing analyzer, and a detailed FPGA routing area model. VPR can perform either global routing or combined global / detailed routing.
Click here 
for information on a new book by myself, Jonathan Rose and Alexander (Sandy) Marquardt on FPGA architecture and CAD. This book is by far the best reference on the algorithms used in VPR and T-VPack, how well they perform, how the area model built into VPR works, and many other things!
Click here to download a paper that describes VPR's capabilities and algorithms, and compares the performance of VPR with that of other FPGA CAD tools. The version of VPR described in this paper is VPR 3.99, so it's not as current as the book (the latest VPR has a lot more features).
Click here to download the source and documentation for VPR and T-VPack.
VPR has recently been added to the SPEC 2000 suite of computer benchmarks (the standard benchmarks used to determine the speed of various workstations). So if you're interested, you can check how fast VPR runs on pretty much every type of computer hardware.
Finally, if you plan on using VPR in your research, please mail vaughn@eecg.utoronto.ca so that I can keep track of who is using VPR and inform you of updates as they become available.
(generated by VPR's built-in graphics).