Welcome! The following pages give information regarding design flows for System on Chip designs that were developed for use at Oklahoma State University. These flows are designed to be used with the Magic and/or Cadence Virtuoso. The cells are also compatible with the MOSIS IC prototype fabrication and low volume production endeavor. The current design rules utilize SCMOS_SUBM rules, however, other rules will be available in the future.

A brief report in PDF format
The OSU standard cell library Version 2.1 (pdf)

ChipTalk is now active where researchers, students, and all interested can get help, information, and support for the use of our flows. It is available via the link above or at the following URL.

Supported Technologies:

• AMI 0.5um (with pad cells)
• AMI 0.35um (with pad cells)
• TSMC 0.25um
• TSMC 0.18um

Provided files:

• Timing Libraries: LIB, DB, TLF
• Simulation Libraries: Verilog, VHDL
• Geometry Libraries: LEF
• Cell layouts: Virtuoso, Magic

We also developed an ASIC design flow for the following tools

• Synopsys Design Compiler
• Cadence Buildgates
• Cadence Silicon Ensemble
• Cadence SOC Encounter

We also have several examples attached so users can verify integrity

• 8-bit Accumulator-based CPU with Newton-Raphson Divide.
• Simple RISC microcontroller from opencores.org based on Microchip 16F84 chip.
• Accumulator connected to pads for simple understanding of design flow.
• Patterson/Hennessy MIPS RTL-based Single-Cycle architecture with Wishbone interface (New)
• Patterson/Hennessy MIPS RTL-based Multi-Cycle architecture with Wishbone interface and microprogramming (New)
• More to come (suggestions welcome)

We also have a mailing list set up to distribute new enhancements and other information that may be pertinent. The mailing list is soc AT ece.iit.edu. If you wish to subscribe to this mailing list, please email James Stine at jstine AT ece.iit.edu and we will be happy to add you to the list. You can also subscribe yourself by emailing soc-request@ece.iit.edu with subscribe in the subject or body of the email.

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