Oklahoma State University VLSI
2005
- J. Stine, C. Babb, and V. Dave, "Constant addition utilizing flagged prefix structures," Proceedings of the International Symposium on Circuits and Systems, 2005 (in press).
- J. Stine and M. J. Schulte, "A combined two's complement and IEEE-compliant floating-point comparator," Proceedings of the International Symposium on Circuits and Systems, 2005 (in press).
2004
- J. Grad and J. E. Stine, "A hybrid Ling carry-select adder," Proceedings of the Thirty Seventh Asilomar Conference on Signals, Systems, and Computers, 2004 (in press).
- N. Iliev, J. E. Stine, and N. Jachimiec "Parallel programmable finite field GF(2/sup m/) multipliers," International Symposium on VLSI, pp. 299-302, 2004.
- A. A. Katkar and J. E. Stine "Modified Booth truncated multipliers" ACM/IEEE Great Lakes Symposium on VLSI pp. 444-447, 2004.
- A. Akkas, M. J. Schulte, and J. E. Stine, "Intrinsic compiler support for interval arithmetic," Numerical Algorithms, Kluwer Academic Publishers, Vol. 37, No. 1, pp. 13-20, 2004.
2003
- J. E. Stine, Digital Computer Arithmetic Datapath Design using Verilog HDL, Kluwer Academic Publishers, ISBN 1-4020-7710-6, 2003.
- C. M. Kaas and J. E. Stine, "A combined interval and floating-point comparator," Thirty-Seventh Asilomar Conference on Signals, Systems, and Computers, pp. 9-12, 2003.
- J. Grad and J. E. Stine, "A standard cell library for student projects," Proceedings of International Symposium on Microelectronic System Education, pp. 98-99, 2003.
- J. E. Stine and O. M. Duvernne "Variations on truncated multiplication," Euromicro Symposium on Digital System Design, pp. 112-119, 2003.
- B. Shinkre and J. E. Stine "A Pipelined Clock-Delayed Carry Lookahead Adder" ACM/IEEE Great Lakes Symposium on VLSI pp. 171-175, 2003.
2002
- J. Grad and J. E. Stine "Hybrid EMODL Ling Adder" Proceedings of the Thirty Sixth Asilomar Conference on Signals, Systems, and Computers pp. 1624-1628, 2002.
- N. Jachimiec and J. E. Stine "Hybrid squaring: with emphasis on FPGA implementation" Proceedings of the Workship on Logic and Synthesis for Programmable Devices, pp. 451-457, 2002.
- J. E. Stine and F. Martinez-Vallina,"Interval-enhanced arithmetic compilers simulated under a DEVS framework," Proceedings of the AI, Simulation, and Planning Conference, pp. 44-50, 2002.
2001
- K. E. Wires, M. J. Schulte, and J. E. Stine "Combined IEEE compliant and truncated floating-point multipliers for reduced power dissipation," International Conference on Computer Design, pp. 497-500, 2001.
- J. E. Stine and M. J. Schulte, "A case for interval hardware on superscalar processors," Scientific Computing, Validated Numerics, and Interval Methods, pp. 53-68, Kluwer Academic Publishers, 2001.
- J. E. Stine and M. J. Schulte, "Evaluating the impact on accurate branch prediction on interval software," Scientific Computing, Validated Numerics, and Interval Methods, pp. 69-80, Kluwer Academic Publishers, 2001.
2000
- K. E. Wires, M. J. Schulte, and J. E. Stine "Variable-correction truncated floating-point multiplication," Proceedings of the Thirty Fourth Asilomar Conference on Signals, Systems, and Computers pp. 1344-1348, 2000.
1999
- J. E. Stine and M. J. Schulte, "The Symmetric Table Additional Method for Accurate Function Approximation'' Journal of VLSI Signal Processing Vol. 21, No. 2, pp. 167-177, 1999.
- M. J. Schulte and J. E. Stine, "Approximating elementary functions with symmetric bipartite tables,'' IEEE Transactions on Computers, Vol. 48, No. 8, pp. 842-847, 1999..
- M. J. Schulte and J. G. Jansen and J. E. Stine "Reduced Power Dissipation through truncated multiplication" Proceedings of the IEEE Alessandro Volta Memorial International Workshop on Low Power Design pp. 61-69, 1999.
1997
- M. J. Schulte and J. E. Stine and K. E. Wires "High-Speed Reciprocal Approximations" Proceedings of the Thirty First Asilomar Conference on Signals, Systems, and Computers Volume 2, pp. 1183-1187, 1997.