Tiziano Villa studied mathematics at the universities of Milano, Pisa and Cambridge, U.K. and electrical engineering and computer science at the University of California, Berkeley, where he completed a Ph.D. in EECS in 1995. He worked in the integrated circuits division of the CSELT Labs, Torino Italy, as a computer-aided design specialist, and then he was a research assistant at the Electronics Research Laboratory, University of California, Berkeley. In 1997 he joined as a Research Scientist the PARADES Labs, Rome, Italy, a research consortium participated by Cadence Design Systems, Magneti-Marelli, ST-Microlelectronics and CNR (Italian National Research Council). Since November 2002 he is an associate professor at the EE department (DIEGM) of the University of Udine, Italy. In May 1991 he was awarded the Tong Leong Lim Pre-doctoral Prize at the EECS Department of the University of California, Berkeley.
Research Activity
His research interests include combinational and sequential logic synthesis, formal verification, combinatorial optimization, automata theory, analysis and synthesis of hybrid systems. He co-authored two books on sequential synthesis: ``Synthesis of FSMs: functional optimization'', Kluwer, 1997 and ``Synthesis of FSMs: logic optimization'', Kluwer, 1997.
