IIT's Place&Route and RC Extract Support Page

Synthesis,  Place&Route, and RC Extract

  1. Important notes on Verilog and Synthesis
  2. Running Design Compiler and Silicon Ensemble
  3. Choose your target system
    4.  Running RC extraction after Silicon Ensemble (Wroute)

Documentation for IIT's cell library

  1. The routing grid
  2. Creating the abstracts
  3. Standard Cell Datasheets

Overview of all available processes


 

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 Johannes Grad