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 DRAM
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      RLDRAM II
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      Overview
      QDR I / QDR II
      ZBT/Nobl
  
 Embedded Memory
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Memory Solutions Center

Altera’s complete memory interface design solutions address today's high-speed memory interface challenges such as memory controller, I/O design, and board-level signal integrity issues. Altera® solutions include advanced FPGA architectures, customizable MegaCore® functions, Quartus® II design software, reference designs, demonstration boards, and simulation models, accompanied by a rich set of technical documentation.

Table 1 lists external memory interfaces supported by Altera FPGAs. 

Table 1. External Memory Interface Specifications Supported by Altera FPGAs
Memory Type Maximum Data Rate (per pin) Maximum Clock Frequency
DDR2 SDRAM 533 Mbps 267 MHz
DDR SDRAM 400 Mbps 200 MHz
RLDRAM II 600 Mbps 300 MHz
SDR SDRAM 200 Mbps 200 MHz
QDR/QDRII SRAM 1000* Mbps 250 MHz
ZBT SRAM 200 Mbps 200 MHz

* 500 Mbps for the read port and 500 Mbps for the write port

DRAM DRAM
SRAM Software
Embedded Memory IP

Related Links

 
Download Memory IP MegaCores - Free Evaluation

Stratix II DDR2-533 Hardware Test Results (New)

Memory Interface Design On-Line Demonstration

   
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