Journal Publications:

1. Charlie Chung-Ping Chen (陳中平教授), "SoC設計探勘突破SoC電氣設計的挑戰與解決方針," Micro-Electronics Magazine (新電子科技雜誌), Sep. 2003.
2. Yu-Min Lee and Charlie Chung-Ping Chen, "The Power Grid Transient Simulation in Linear Time based on 3D Alternating-Direction-Implicit Method,"  IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD), Vol. 22, No. 11, Nov. 2003.
   
3. Ting-Yuan Wang and Charlie Chung-Ping Chen, "Thermal-ADI: A Linear-Time Chip-Level Dynamic Thermal Simulation Algorithm Based on Alternating-Direction-Implicit (ADI) Method," IEEE Transaction on Very Large Scale Integration Systems (TVLSI), Vol. 11, No. 4, pp691- 700, Aug. 2003.
   
4. Tsung-Hao Chen, Clement Luk, and Charlie Chung-Ping Chen, "INDUCTWISE: Inductance-Wise Interconnect Simulator and Extractor," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 22, No. 7, pp884-894, Jul. 2003.
   
5. Ting-Yuan Wang and Charlie Chung-Ping Chen, "3-D Thermal-ADI: a linear-time chip level transient thermal simulator," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD), Vol. 21, No. 12 , pp1434 -1445,  Dec. 2002.
   
6. Yu-Min Lee and Charlie Chung-Ping Chen, "Power Grid Transient Simulation in Linear Time based on Transmission-Line-Modeling Alternating-Direction-Implicit Method," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD), Vol. 21, No. 11, pp1343 -1352, Nov. 2002.
   
7. Yu-Min Lee, Charlie Chung-Ping Chen, and D. F. Wong, "Optimal Wire-sizing Function under the Elmore Delay Model with Bounded Wiresizes," IEEE Transactions on Circuits & Systems-I (TCAS-I) Vol. 49, No. 11, pp1671-1677, Nov.  2002.
   
8. Chung-Ping Chen, Chris C. N. Chu, and D. F. Wong, "Fast and Exact Simultaneous Gate and Wire Sizing by Lagrangian Relaxation," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD), Vol. 18, No. 7, pp1014-1025, Jul. 1999.
   

Conference/Workshop Publications:

1. Tsung-Hao Chen, Clement Luk, and Charlie Chung-Ping Chen, "SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation", in the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2003.
   
2. Ting-Yuan Wang, Yu-Min Lee, and Charlie Chung-Ping Chen, "3D Thermal-ADI: An Efficient Chip-Level Transient Thermal Simulator," ACM International Symposium on Physical Design (ISPD), 2003. ( Best Paper Award )
   
3. Jeng-Laing Tsai, Tsung-Hao Chen, and Charlie Chung-Ping Chen, "Epsilon-Optimal Zero-Skew Clock Tree Wire-Sizing in Pseudo-Polynomial Time,"  ACM International Symposium on Physical Design (ISPD), 2003.
   
4. Yu-Min Lee and Charlie Chung-Ping Chen, "The Power Grid Transient Simulation in Linear Time based on 3D Alternating-Direction-Implicit Method," Design, Automation and Test in Europe Conference and Exhibition (DATE), 2003.
   
5. Tsung-Hao Chen, Clement Luk, Hyungsuk Kim, and Charlie Chung-Ping Chen, "INDUCTWISE: Inductance-Wise Interconnect Simulator and Extractor", IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2002.
   
6. Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, and Charlie Chung-Ping Chen, "HiPRIME: Hierarchical and Passivity Reserved Interconnect Macromodeling Engine for RLKC Power Delivery", IEEE/ACM Design Automation Conference (DAC), 2002.
   
7. Ting-Yuan Wang and Charlie Chung-Ping Chen, "Optimization of the Power/Ground Network Wire-Sizing and Spacing Based on Sequential Network Simplex Algorithm," 3rd International Symposium on Quality Electronic Design (ISQED), 2002.
   
8. Yu-Min Lee and Charlie Chung-Ping Chen, "Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method," IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2001
   
9. Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk Kim, Yu-Min Lee and Charlie Chung-Ping Chen, "Linear Time Hierarchical Capacitance Extraction Without Multipole Expansion," International Conference on Computer Design (ICCD), 2001.
   
10. Pradeepsunder Ganesh and Charlie Chung-Ping Chen, "RC-in RC-out Model Order Reduction Accurate Up to Second Order Moments," International Conference on Computer Design (ICCD), 2001.
    
11. Tsung-Hao Chen and Charlie Chung-Ping Chen, "Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods," IEEE/ACM Design Automation Conference (DAC), 2001.
    
12. Ting-Yuan Wang and Charlie Chung-Ping Chen, "Thermal-ADI: A Linear-Time Chip-Level Dynamic Thermal Simulation Algorithm Based on Alternating-Direction-Implicit (ADI) Method," ACM International Symposium on Physical Design (ISPD), 2001.  [slide]
    
13. Yu-Min Lee, Hing Yin Lai, and Charlie Chung-Ping Chen, "Optimal spacing and capacitance padding for general clock structures," Asian and South Pacific Design Automation Conference (ASP-DAC), 2001.
    
14. Yu-min Lee and Charlie Chung-Ping Chen, "Hierarchical model order reduction for signal-integrity driven interconnect synthesis," Great Lakes Symposium on VLSI (GLSVLSI) 2001.
    
15. Charlie Chung-Ping Chen, Narayanan Murugesan, Tae-Woo Lee, and Susan C. Hagness, "FDTD-ADI: An Unconditionally Stable Full Wave Maxwell Equation Solver for VLSI Modeling," IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2000.
    
16. Chung-Ping Chen and N. Menezes, "Noise-Aware Repeater Insertion and Wire-Sizing for On-chip Interconnect Using Hierarchical Moment-Matching," IEEE/ACM Design Automation Conference (DAC), 1999.
    
17. Chung-Ping Chen and D.F. Wong, "Error-bounded Pade Approximation via Bilinear Conformal Transformation," IEEE/ACM Design Automation Conference (DAC), 1999.
    
18. N. Menezes and Chung-Ping Chen "Spec-based Repeater Insertion and Wire-Sizing for On-chip Interconnect," Twelfth International Conference on VLSI Design, 1999. 
    
19. Chung-Ping Chen, Chris C. N. Chu, and D. F. Wong, "Fast and Exact Simultaneous Gate and Wire Sizing by Lagrangian Relaxation," IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1998.
    
20. Chung-Ping Chen and D. F. Wong, "Optimal Wire-Sizing Function with Fringing Capacitance Consideration," IEEE/ACM Design Automation Conference (DAC), 1997.
    
21. Chung-Ping Chen, Hai Zhou, and D. F. Wong, "Optimal Non-Uniform Wire-Sizing under the Elmore Delay Model," IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1996.
    
22. Chung-Ping Chen, Yao-Ping Chen, and D. F. Wong, "Optimal Wire-Sizing Formula under the Elmore Delay Model," IEEE/ACM Design Automation Conference (DAC), 1996.
    
23. Chung-Ping Chen, Yao-Wen Chang, and D. F. Wong, "Fast performance-driven optimization for buffered clock trees based on Lagrangian relaxation," IEEE/ACM Design Automation Conference (DAC), 1996.
    
24. Chung-Ping Chen and D. F. Wong, "A Fast Algorithms for Optimal Wire-Sizing under the Elmore Delay Model," IEEE International Symposium on Circuits and Systems (ISCAS), 1996.

Reports:

1. Clement Luk and Charlie Chung-Ping Chen, "Efficient Inductance Extraction for On-chip Interconnects," 2003.
2. Tsung-Hao Chen, Hyoung-Suk Kim, and Charlie Chung-Ping Chen, "L Extracted? Now What? Introduction to An Inductance-Wise Interconnect Simulation Engine (INDUCTWISE)", Technical Report, University of Wisconsin-Madison, 2002.
3. Hyungsuk Kim and Charlie Chung-Ping Chen, "Be Careful of Self and Mutual Inductance Formulae," 2001.