Â
Education
Thesis: Implementation of a Small Distributed Control System
Master Thesis: An Automatic Measurement and Control System based on Fieldbus Technology Advisor: Prof. Ren Shi
Ph. D. Dissertation: Fast Interconnect Optimization. Advisor: Prof. Weiping Shi. Reserch Interest My main research interests are Computer-Aided design of Very Large Scale Integration (VLSI-CAD) and design and analysis of algorithms related to VLSI CAD, including interconnect optimization in deep sub-micron technology, clock network synthesis for high speed chip design, variation tolerant design, fast parasitic extraction for VLSI circuits and packages, timing analysis with process variation, power efficient physical design and at-speed testing. I have coauthored 7 journals, 23 conference papers and 8 pending patents in VLSI design and CAD field. I developed several very fast buffer insertion algorithms to efficiently speed up the traditional interconnect optimization process in the VLSI design flow by orders of magnitude. Some algorithms are successfully implemented in industry tool and significantly improve the performance of previous tool. I also developed a new delay fault model considering parametric process variation and manufacturing defects and used it in a new fault simulation engine and an ATPG tool. HONOR AND AWARDS
Professional Experience
Membership IEEE Member, IEEE Circuits and System Society Committee Member
Technical Referee
| Homeï¼ä¸»é¡µï¼Personalï¼ä¸ªäººç®åï¼Publicationï¼èä½ï¼Software - FBI (Fast Buffer Insertion)ï¼è½¯ä»¶ï¼Linkï¼è¿æ¥ï¼Shopping(è´ç©ï¼Photos and Videos(å¾åè§é¢ï¼My Old HomepageMy MSN Blog in Chineseï¼ä¸æå客ï¼Ying Zhou's Homepage |