CS510

Design Automation

Spring 2003.
Instructor: Patrick H. Madden; pmadden@cs.binghamton.edu
Office: N16, x2943
Hours: TTh 8:30-10, but might change...
Text: Assorted technical papers from major journals and conferences
Lecture notes: http://vlsicad.cs.binghamton.edu/~pmadden/cs510

Syllabus

Course Objectives

At 6 am, you are dropped off in Silicon Valley, with nothing but a canteen of water, compass, and pocket knife. By noon, you should have a six figure salary, a Porsche, and a cubicle to call your own. Integrated circuits are increasing in complexity at an exponential rate; major companies such as Intel, Motorola, and AMD rely heavily on design automation tools to push silicon technology to its limits. Without state of the art tools, it is impossible to build state of the art circuits.
The objective of this course is to familiarize you with current trends in design automation tools, with a focus on the underlying algorithms and fundamental problems in the field. The material will be useful to anyone interested in a career in design automation with a chip producer, a design tool development company, or as a researcher in this area. Many of the algorithms will be relevant to other problem domains; even if you do not pursue a career related to design automation, you may find much of the material in this course interesting. As this is an upper level course, there will be a focus on the development of research and writing skills.

Course Description

    This course is a modification of a previous offering of CS511; CS511 has more of a focus on synthesis and testing, and less on physical design. This course will focus heavily on the underlying algorithms,
    The course will have a strong research emphasis. Most employers are interested in people who can not only apply known results, but also develop new methods, or apply old methods in surprising ways. Assignments will include technical writing, research, and software development.
    There are two main areas of design automation which will be covered.

Physical Design Automation

Physical Design Automation involves the translation of a symbolic representation of a circuit (logic gates and memory elements) into layouts that can be sent to fabrication houses. Logic block placement has been a test bed for a variety of heuristic algorithms, including simulated annealing, simulated tempering, genetic algorithms, and force directed algorithms. Partitioning and clustering are also heavily used in placement applications. Routing of wires usually involves the heuristic application of a number of classic graph algorithms: shortest path, spanning and Steiner tree, maximum flow/minimum cut. The bulk of the material in this class will be on physical design automation.

Synthesis

Synthesis is crucial to implementation of large designs. Rather than constructing a schematic diagram of an entire circuit, a designer can write "code" in a high level language, and rely on a circuit compiler to convert the code into a schematic. Popular high level languages are VHDL and Verilog; we will cover a bit of VHDL, and possibly go through some small circuit designs using it.

Grading Basis

Grades will be based on the following.
Quiz 1: 20%
Quiz 2: 20%
Final: 20%
Program 1: 20%
Program 2: 20%

Attendance is not required (but research shows that coming to class improves understanding of material). Feel free to discuss assignments with your classmates in order to improve your understanding of the material. Rely on them to improve your work, but not to have them do your work for you. The standard rules on plagiarism apply.

Miscellaneous

Source code for programming assignments should be readable and documented. Most employers want people who write good code; salaries in the industry are not unrelated to this.

Lecture notes will be available on the web, but not all the figures that are shown in class will appear there (due to possible copyright problems), and we may discuss things in class that don't appear in the outline.

Review for Quiz 1: