HDL Level - Unix - Cadence


URL: http://www.cadence.com
University Program:
http://www.cadence.com/company/university/Basic tool flow:

Tool Definitions:
Universities can obtain a bundle of software tools  from  Cadence called "DV" which stands for Design Verification. It includes several tools including the NC simulators (Sim, VHDL and Verilog) and the Ambit BuildGates synthesis tool.
The output of the synthesis tool can be used by the CIC bundle to complete the flow to layout. 

For more details on bundles available from Cadence, see http://www.cadence.com/company/university/ssf_2003.pdf 

System Requirements: Server platforms can be SUN (Solaris), HP (HP-UX), IBM (AIX) or Windows NT (for some products such as the HDL simulators).

Libraries:

A 12-cell standard cell library which can be  fabricated on  the MOSIS educational  runs  using  the AMI-0.6 (C5N) process  with SCN3ME_SUBM rules is available at no charge from  the  University of Tennessee:

http://vlsi1.engr.utk.edu/ece/bouldin_courses/cadence.html

For additional information, contact:  dbouldin@tennessee.edu

Licensing:
Floating licenses with license server.

Educational Program Contact for Quote:
Nell Mathot
nm@cadence.com
TEL: (512)-349-1126
FAX: (512)-342-5021

Universities using Cadence tools can be found here: http://www.cadence.com/company/university/university_links.html