Academic Honors and Activities

Academic Honors and Activities

Academic Honors
1. ¥xÆW¤j¾Ç¡u±Ð¾ÇÀu¨}¼ú¡vExcellent Teacher Award, National Taiwan University, September 2007.
2. ³Ì¨Î½×¤å¼ú Best Paper Award at the 2007 VLSI Design/CAD Symposium, for the paper ``BioRoute: A network-flow based routing algorithm for digital microfluidic biochips.''
3. «ü¾É¾Ç¥ÍÀò±Ð¨|³¡¡u¤E¤Q¤¾Ç¦~«×¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v¯SÀu(¤G¥ó), ¨Î§@(¤T¥ó) The 1st and 3rd Places, supervision for the IC/CAD Contest, Ministry of Education, July 2007.
4. Àò«ä·½¬ì§Þ±Ð¨|°òª÷·|(«ä·½¬ì§ÞªÑ¥÷¦³¤½¥qÃÙ§U) ACM/IEEE Design Automation Conference (DAC) and IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ½×¤å¼ú, 2007.
5. ACM/IEEE DAC ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award at the 2007 ACM/IEEE Design Automation Conference (DAC'07), for the paper ``An integer linear programming algorithm for flip-chip routing.''
6. ACM ISPD ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award at the 2007 ACM International Symposium on Physical Design (ISPD'07), for the paper ``X-architecture placement based on effective wire models.''
7. ACM ISPD ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award at the 2007 ACM International Symposium on Physical Design (ISPD'07), for the paper ``Efficient obstacle-avoiding rectilinear Steiner tree construction.''
8. °ê¬ì·|¡u¬ã¨sp¹º²Ä¤@¯Å¥D«ù¶O¡v (formerly ³Ç¥X¬ã¨s¼ú) First-Class Principal Investigator Award (formerly Distinguished Research Award) of National Science Council, Taiwan, for distinguished research, August 2006.
9. «ü¾É¾Ç¥ÍÀò±Ð¨|³¡¡u¤E¤Q¥|¾Ç¦~«×¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v¯SÀu(¤@¥ó), Àuµ¥(¤@¥ó), ¨Î§@(¤G¥ó) The 1st, 2nd, and 3rd Places, supervision for the IC/CAD Contest, Ministry of Education, July 2006.
10. Àò«ä·½¬ì§Þ±Ð¨|°òª÷·|(«ä·½¬ì§ÞªÑ¥÷¦³¤½¥qÃÙ§U) ACM/IEEE Design Automation Conference (DAC) and IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ½×¤å¼ú, 2006.
11. NTUplace Àò 2006 ACM/IEEE ISPD °ê»Ú¹q¤l³]p¦Û°Ê¤Æ Â\¸m³nÅé ¬ãµoÄvÁÉ²Ä¤T¦W (¤À¶µµû¤ñ: ¾É½uªø²Ä¤@¦W; ¾ãÅé«~½è²Ä¤G¦W [»P²Ä¤@¦W®t¶Z¤p©ó 1%]; ¾ãÅéÁ`¤À²Ä¤T¦W [»P²Ä¤@¦W®t¶Z¤p©ó 2%, »~®t½d³ò¤º]); ¬ãµo¹Î¶¤: ³¯ªF³Ç, ¦¿õºû, ³\¤Ñ¹ü, ³¯«H¦¨, ±iÄ£¤å (The 3rd Place at the Placement Contest hosted by ACM/IEEE International Symposium on Physical Design (ISPD), 2006. (#1 in wirelength, #2 in overall quality [wirelength + density], less than 1% away from the #1, #3 in overall rating [wirelength + density + CPU time], less than 2% away from the #1)
12. ¥xÆW¤j¾Ç¡u±Ð¾ÇÀu¨}¼ú¡vExcellent Teacher Award, National Taiwan University, September 2006.
13. °ê¬ì·|¡u¬ã¨sp¹º²Ä¤@¯Å¥D«ù¶O¡v (formerly ³Ç¥X¬ã¨s¼ú) First-Class Principal Investigator Award (formerly Distinguished Research Award) of National Science Council, Taiwan, for distinguished research, August 2005.
14. «ü¾É¾Ç¥ÍÀòÀsÄË½×¤å¼ú The Acer Long-Term Thesis Award, supervision for the paper "mSIGMA: A Multilevel Full-Chip Routing System Considering SIGnal-integrity and MAnufacturability," Student: ¦ó©v©ö (Ph.D.; co-supervised with Prof. Sao-Jie Chen), 2005.
15. «ü¾É¾Ç¥ÍÀò¬ìªL½×¤å¼úÀYµ¥¼ú The 1st Place Prize, Lam Thesis Award, supervision for the paper "An Optimal Algorithm for Jumper Insertion for Antenna Avoidance/Fixing," Student: Ä¬¬f¿o (undergraduate), 2005.
16. «ü¾É¾Ç¥ÍÀò¬ìªL½×¤å¼úÀuµ¥¼ú The 2nd Place Prize, Lam Thesis Award, supervision for the paper "mSIGMA: A Multilevel Full-Chip Routing System Considering SIGnal-integrity and MAnufacturability," Student: ¦ó©v©ö (Ph.D.; co-supervised with Prof. Sao-Jie Chen), 2005.
17. ¤¤°ê¹q¾÷¤uµ{¾Ç·|«C¦~½×¤å«ü¾É¼ú M.S. Thesis Supervision Award (3rd Place), The Chinese Institute of Electrical Engineering, Taiwan, Student: §d«Û½n (Yen-Wei Wu), Thesis title: µ²¦Xpºâ¾÷µ²ºcº[¹êÅé³]p¤§·Å«×·Pª¾»²§U³]p, 2005.
18. ACM/IEEE DAC ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award at the 2005 ACM/IEEE Design Automation Conference (DAC'05), for the paper ``Multilevel full-chip routing based on the X-architecture.''
19. Àò«ä·½¬ì§Þ±Ð¨|°òª÷·|(«ä·½¬ì§ÞªÑ¥÷¦³¤½¥qÃÙ§U) ACM/IEEE Design Automation Conference (DAC) and IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ½×¤å¼ú, 2005.
20. «ü¾É¾Ç¥ÍÀò±Ð¨|³¡¡u¤E¤Q¤T¾Ç¦~«×¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v¯SÀu(¤G¥ó), Àuµ¥(¤@¥ó), ¨Î§@(¤T¥ó) The 1st, 2nd, and 3rd Places, supervision for the IC/CAD Contest, Ministry of Education, July 2005.
21. ¡u©ô§»¹q¤l«C¦~±Ð±ÂÁ¿®y¡vMXIC Young Chair Professorship, MXIC, 2005.
22. ¥xÆW¤j¾Çº©¡¡u¬ã¨s¦¨´N¼ú¡v(²{¤µ¡u³Å´µ¦~¼ú¡v) All-university Research Achievement Award, National Taiwan University, September 2004.
23. ¥xÆW¤j¾Ç¡u±Ð¾ÇÀu¨}¼ú¡vExcellent Teacher Award, National Taiwan University, September 2004.
24. °ê¬ì·|¡u§d¤j·ß¥ý¥Í¬ö©À¼ú¡v Mr. Wu Ta You Memorial Award of National Science Council, Taiwan, for research excellence, July 2004.
25. Àò«ä·½¬ì§Þ±Ð¨|°òª÷·|(«ä·½¬ì§ÞªÑ¥÷¦³¤½¥qÃÙ§U) ACM/IEEE Design Automation Conference (DAC) ½×¤å¼ú, 2004
26. «ü¾É¾Ç¥ÍÀò±Ð¨|³¡¡u¤E¤Q¤G¾Ç¦~«×¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v¯SÀu(¤@¥ó), Àuµ¥(¤@¥ó), ¨Î§@(¤G¥ó) The 1st, 2nd, and 3rd Places, supervision for the IC/CAD Contest, Ministry of Education, July 2004.
27. IEEE/ACM ASP-DAC ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award at the 2004 IEEE/ACM Asia and South Pacific Design Automation conference (ASP-DAC'04), for the paper ``Temporal floorplanning using 3D-subTCG,'' January 2004.
28. ACM TODAES ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award from ACM Transactions on Design Automation of Electronic Systems (TODAES), for the paper ``Rectilinear block placement using B*-trees,'' 2003.
29. Àò«ä·½¬ì§Þ±Ð¨|°òª÷·|(«ä·½¬ì§ÞªÑ¥÷¦³¤½¥qÃÙ§U) ACM/IEEE Design Automation Conference (DAC) ½×¤å¼ú (¬°¥»¦~«×°ß¤@Àò¼úªÌ), 2003
30. «ü¾É¾Ç¥ÍÀò¬ìªL½×¤å¼úÀYµ¥¼ú First Place Prize, Lam Thesis Award, supervision for the paper "Robust fixed-outline floorplanning using adaptive simulated annealing," Student: ³¯ªF³Ç, 2003.
31. «ü¾É¾Ç¥ÍÀò±Ð¨|³¡¡u¤E¤Q¤@¾Ç¦~«×¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v¯SÀu(¤@¥ó), Àuµ¥(¤G¥ó), ¨Î§@(¤T¥ó), ¤J¿ï(¤T¥ó) The 1st, 2nd, 3rd Places and Honorable Mention, supervision for the IC/CAD Contest, Ministry of Education, 2003.
32. ¤¤µØ¥Á°ê¸ê°T¾Ç·|³Õ¤h½×¤å¨Î§@«ü¾É¼ú Ph.D. Dissertation Supervision Award, Institute of Information & Computing Machinery, Taiwan, R.O.C., Student: Jai-Ming Lin, Dissertation title: Transitive Closure Graph Based Representations for VLSI Floorplan Design, 2002.
33. «ü¾É¾Ç¥ÍÀò¬ìªL½×¤å¼úÀuµ¥ Lam Thesis Award, supervision for the work "Chip placement for multiple project wafer," Students: ±i´Ñ´P, ±i¨|Þ³, 2002.
34. ¤¤°ê¹q¾÷¤uµ{¾Ç·|«C¦~½×¤å«ü¾É¼ú M.S. Thesis Supervision Award (3rd Place), The Chinese Institute of Electrical Engineering, Taiwan, Student: Shih-Ping Lin, Thesis title: A Novel Framework for Multilevel Routing Considering Routability and Performance, 2002.
35. IEEE/ACM ICCAD ³Ì¨Î½×¤å¼ú´£¦W Nomination for Best Paper Award at the 2002 IEEE/ACM International Conference on Computer-Aided Design (ICCAD'02), for the paper ``A Novel Framework for Multilevel Routing Considering Routability and Performance.''
36. «ü¾É¾Ç¥ÍÀò°ê¬ì·|ºÓ¤h½×¤å¼ú Supervision for a Best M.S. Thesis Award (inaugural award), for the thesis "Performance-driven modeling and optimization under the transmission-line delay model," National Science Council, 2002. Student: Tai-Chen Chen.
37. «ü¾É¾Ç¥ÍÀòº©¡¥xÆW IC ³]p¾Ç·|¨H¤å¤¯±Ð±Â¦~«×½×¤å¼ú Prof. Wen-Zen Shen Memorial Paper Award, supervision for the paper "TCG: A transitive closure graph based representation for general floorplans," Student: Jai-Ming Lin, 2002.
38. VLSI Design/CAD Symposium ½×¤å³Ì°ª¤À Highest Score, for the paper "Integrating Buffer Planning with Floorplanning for Simultaneous Area, Timing, Noise, and Congestion Optimization," The 13th VLSI Design/CAD Symposium, August 2002.
39. «ü¾É¾Ç¥ÍÀò±Ð¨|³¡¡u¤E¤Q¾Ç¦~«×¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v¯SÀu(¤G¥ó), Àuµ¥(¤@¥ó), ¨Î§@(¤@¥ó), ¤J¿ï(¤T¥ó) The 1st, 2nd, 3rd Places and Honorable Mention, supervision for the IC/CAD Contest, Ministry of Education, 2002.
40. IEEE ICCD CAD Track ½×¤å³Ì°ª¤À Highest Score in the CAD Track, 2001 IEEE International Conference on Computer Design (ICCD'01), for the paper ``Generic ILP-based approaches for dynamically reconfigurable FPGA partitioning."
41. VLSI Design/CAD Symposium ½×¤å³Ì°ª¤À Highest Score, for the paper "A P-admissible non-slicing floorplan representation with a worst-case linear-time packing scheme," The 12th VLSI Design/CAD Symposium, August 2001.
42. ±Ð¨|³¡VLSI¹q¸ô»P¨t²Î±Ð¨|§ï¶ip¹º±Ð§÷¨Î§@¼ú Teaching Material Award for the course "Introduction to VLSI Design," Ministry of Education, Taiwan, August 2001.
43. ¥æ³q¤j¾Çº©¡Àu¨}±Ð¾Ç¼ú Inaugural all-university Excellent Teacher Award, National Chiao Tung University, September 2000.
44. ³Ì¨Î¾Ç¥Í½×¤å«ü¾É¼ú Best Student Paper Award Supervision (inaugural award), for the paper "Simultaneous wire sizing and buffer insertion/sizing with applications to interconnect-driven floorplanning," The 11th VLSI Design/CAD Symposium, August 2000, Students: Chia-Yuan Chang and Iris Hui-Ru Jiang.
45. ACM/IEEE DAC ¼f¬d©eû³Ì¨Î½×¤å¼ú´£¦W Reviewers' Nominations for Best Paper Award at the 2000 ACM/IEEE Design Automation Conference (DAC'2K), for the paper ``B*-trees: A New Representation for Nonslicing Floorplans.''
46. ¬ü°ê¹q¤l¤u·~©P¥Z³ø¾É EE Times Citation (article "FPGA'99: Advanced processes unleash architectural ideas," February 23, 1999) on our research paper ``Universal switch blocks for three-dimensional FPGA design,'' presented at 1999 ACM International Symposium on Field Programmable Gate Arrays (FPGA-99), Monterey, CA, February 1999.
47. ¤¤°ê¹q¾÷¤uµ{¾Ç·|«C¦~½×¤å«ü¾É¼ú M.S. Thesis Supervision Award (2nd Place), The Chinese Institute of Electrical Engineering, Taiwan, Student: Jai-Ming Lin, Thesis title: Matching-based Algorithms for FPGA Segmentation Design, 1998.
48. ACM FPGA ½×¤å³Ì°ª¤À Highest Score at 1996 ACM International Aymposium on Field-Programmable Gate Arrays (FPGA'96), for the paper "Universal switch-module design for symmetrical-array-based FPGAs."
49. IEEE ICCD ³Ì¨Î½×¤å¼ú Best Paper Award at the 1995 IEEE International Conference on Computer Design (ICCD'95), for the paper ``FPGA global routing based on a new congestion metric.''
International Academic Activities
1. ½s¿è©eû Editor, Journal of Information Science and Engineering (SCI, EI), January 2007 -- December 2009.
2. º©¡ ACM/SIGDA Physical Design §Þ³N©eû Technical Committee, October 2006 -- present.
3. «È®y±Ð±Â, Visiting Professor, Waseda University (¦½_¥Ð¤j¾Ç), Japan, April 2005--present.
4. ACM ISPD ·|Ä³¥D®u (¹w©w) General Chair, ACM International Symposium on Physical Design (ISPD), 2011.
5. ACM ISPD Ä³µ{¥D®u (¹w©w) Technical Program Committee Chair , ACM International Symposium on Physical Design (ISPD), 2010.
6. ACM ISPD Ä³µ{©eû (Ý¥Xª©¥D®u) (¹w©w) Technical Program Committee (Publication Chair) , ACM International Symposium on Physical Design (ISPD), 2009.
7. IEEE FPT Ä³µ{¦@¦P¥D®u Technical Program Committee Co-chair, IEEE International Conference on Field-Programmable Technology (FPT), Taiwan, December 2008.
8. IEEE/TSA VLSI-DAT Ä³µ{©eû(Ý¥DÃD¥D®u) Technical Program Committee (Topic Chair), IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT), Hsinchu, Taiwan, April 2008.
9. ACM ISPD Ä³µ{©eû (Ý«Å¶Ç¥D®u) Technical Program Committee (Publicity Chair) , ACM International Symposium on Physical Design (ISPD), 2008.
10. ACM/IEEE ASP-DAC Ä³µ{©eû(Ý¥DÃD¥D®u) Technical Program Committee (Topic Chair), ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, January 2008.
11. IEEE FPT Ä³µ{©eû Technical Program Committee, IEEE International Conference on Field-Programmable Technology (FPT), Kitakyushu, Japan, December 2007.
12. IEEE IECON Ä³µ{©eû (Ý¥DÃD¥D®u) Technical Program Committee (Topic Chair), IEEE IECON, Taipei, Taiwan, December 2007.
13. IEEE TENCON Ä³µ{©eû Technical Program Committee, IEEE TENCON, Taipei, Taiwan, October 2007.
14. IEEE SOCC Ä³µ{©eû(Ý¥DÃD¥D®u) Technical Program Committee (Topic Chair), IEEE SOCC, Hsinchu, Taiwan, September 2007.
15. ACM/IEEE DAC Ä³µ{©eû Technical Program Committee, ACM/IEEE Design Automation Conference (DAC), San Diego, CA, June 2007.
16. ACM ISPD Ä³µ{©eû Technical Program Committee, ACM International Symposium on Physical Design (ISPD), CA, U.S.A., March 2007.
17. IEEE/TSA VLSI-DAT Ä³µ{©eû Technical Program Committee, IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT), Hsinchu, Taiwan, April 2007.
18. IEEE/ACM DATE Ä³µ{©eû Technical Program Committee, IEEE/ACM Design Automation and Test Conference in Europe (DATE), Munich, Germany, April 2007.
19. ACM GLSVLSI Ä³µ{©eû Technical Program Committee, ACM Great Lake Symposium on VLSI (GLSVLSI), Italy, March 2007.
20. ACM/IEEE ASP-DAC Ä³µ{©eû(Ý¥DÃD¥D®u) Technical Program Committee (Topic Chair), ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Minato-Mirai Yokohama, JAPAN, January 2007.
21. IEEE/ACM ICCAD Ä³µ{©eû Technical Program Committee, IEEE/ACM International conference on Computer-Aided Design (ICCAD), CA, U.S.A., November 2006.
22. IEEE FPT Ä³µ{©eû Technical Program Committee, IEEE International Conference on Field-Programmable Technology (FPT), Austin, Texas, U.S.A., December 2006.
23. IEEE ICCD Ä³µ{©eû Technical Program Committee, IEEE International conference on Computer Design (ICCD), CA, U.S.A., October 2006.
24. IEEE SOCC Ä³µ{©eû Technical Program Committee, IEEE International SOC Conference (SOCC), Austin, Texas, U.S.A., September 2006.
25. ACM ISPD Ä³µ{©eû Technical Program Committee, ACM International Symposium on Physical Design (ISPD), CA, U.S.A., April 2006.
26. IEEE/TSA VLSI-DAT Ä³µ{©eû Technical Program Committee, IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT), Hsinchu, Taiwan, April 2006.
27. IEEE/ACM DATE Ä³µ{©eû Technical Program Committee, IEEE/ACM Design Automation and Test Conference in Europe (DATE), Munich, Germany, March 2006.
28. ACM/IEEE ASP-DAC Ä³µ{©eû Technical Program Committee, ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Minato-Mirai Yokohama, JAPAN, January 2006.
29. IEEE/ACM ICCAD Ä³µ{©eû Technical Program Committee, IEEE/ACM International conference on Computer-Aided Design (ICCAD), CA, U.S.A., November 2005.
30. IEEE ICCD Ä³µ{©eû Technical Program Committee, IEEE International conference on Computer Design (ICCD), CA, U.S.A., October 2005.
31. IEEE/ACM DATE Ä³µ{©eû Technical Program Committee, IEEE/ACM Design Automation and Test Conference in Europe (DATE), Munich, Germany, March 2005.
32. ACM/IEEE ASP-DAC Ä³µ{©eûÝ¥DÃD¦@¦P¥D®u Technical Program Committee (Topic Co-Chair), ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Shanghai, China, January 2005.
33. IEEE APCCAS Ä³µ{©eû Technical Program Committee, The 2004 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2004), Tainan, Taiwan, December 2004.
34. IEEE/ACM ICCAD Ä³µ{©eû Technical Program Committee, IEEE/ACM International conference on Computer-Aided Design (ICCAD), CA, U.S.A., November 2004.
35. IEEE ICCD Ä³µ{©eû Technical Program Committee, IEEE International conference on Computer Design (ICCD), CA, U.S.A., October 2004.
36. ACM/IEEE ASP-DAC Ä³µ{©eû Technical Program Committee, ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Minato-Mirai Yokohama, JAPAN, January 2004.
37. ACM/IEEE ASP-DAC Ä³µ{©eû Technical Program Committee, ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Kitakyushu, JAPAN, January 2003.
38. »´ä¬ã¨s¸ê§U§½¥~¼f©eû External Assessor, Research Grants Council, Hong Kong, China, April 2002--present.
39. Ä³ÃD¥D®u Session Chairman, IEEE/ACM ICCAD, ACM/IEEE ASP-DAC, ACM ISPD, IEEE ISCAS.
40. ACM/IEEE ASPDAC Ä³µ{©eû Technical Program Committee, ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, JAPAN, January 2001.
41. ACM Asia Programming Contest Committee, December 2000.
42. Reviewer, Conferences: ASP-DAC, DAC, DATE, ICCAD, ICCD, ISCAS, ISPD, GLSVLSI, SOCC, FPT, VLSI-DAT, TENCON, IECON; journals: ACM TODAES, IEEE TC, TCAD, TVLSI, TCAS-1, JSSC.
Domestic Academic/Industrial Activities
1. ³Ð±©¬ì§ÞªÑ¥÷¦³¤½¥q¿W¥ß¸³¨Æ, Independent Board Director, Genesys Logic Inc., June 2007--June 2009.
2. ±Ð¨|³¡«eÂ¤´¹¤ù¨t²Î¤H¤~°ö¨|¥ý¾É«¬p¹º DAT Áp·ù («e EDA Áp·ù)¥l¶°¤H Chair, The Design Automation and Test (DAT) Consortium, The Advisory Office, Ministry of Education, Taiwan, January 2006--present.
3. ¥xÆWIC³]p¾Ç·|²z¨Æ Member of Board of Governors, Taiwan IC Design Society, Taiwan, August 2004-present.
4. ¸gÀÙ³¡§Þ³N³B¡u¤p«¬¥ø·~³Ð·s¬ãµopµe(SBIR)¡v¼f¬d©eû/¥D¼f Reviewer/Principal Reviewer, SBIR, Ministry of Economics Affairs, Taiwan, 2007.
5. ¤u¬ã°|´¹¤ù¤¤¤ß²£¾Ç¬ã¦X§@©eû·|©eû Committee member, ITRI-STC Industry-Academia-Research Collaboration Committee, Taiwan, 2005--2006.
6. ±Ð¨|³¡VLSI¹q¸ô»P¨t²Î±Ð¨|§ï¶ip¹º EDA Áp·ù¥l¶°¤H Chair, The Electronic Design Automation (EDA) Consortium, The Advisory Office, Ministry of Education, Taiwan, January 2005--December 2005.
7. Ápµo¬ì§ÞªÑ¥÷¦³¤½¥q§Þ³NÅU°Ý Consultant, MediaTek Inc., Taiwan, March 2005--February 2006.
8. ´¼ì¬ì§ÞªÑ¥÷¦³¤½¥q§Þ³NÅU°Ý Consultant, Faraday Corp., Taiwan, October 2004--September 2005.
9. ±Ð¨|³¡VLSI¹q¸ô»P¨t²Î±Ð¨|§ï¶ip¹ºSOCÁ`Áp·ù°õ¦æ¯µ®Ñ Executive Secretary, The System-on-Chip (SOC) Consortium, The Advisory Office, Ministry of Education, Taiwan, March 2001--December 2004.
10. ¥x¤j¤uµ{¾Ç¥Z½s¿è Editor, Bulletin of the College of Engineering, National Taiwan University, 2002-2005.
11. ¸gÀÙ³¡·~¬É¬ì±Mpµe¼f¬d©eû Review Committee, Ministry of Economics Affairs, Taiwan, July 2001--present.
12. Á`°È¥D®u General Affairs Chair, The VLSI Design/CAD Symposium, Taiwan, August 2004.
13. °ê¬ì·|VLSI/CAD¾Çªù³W¹º©eû VLSI/CAD Planning Committee, National Science Council, Taiwan ROC, 2001--2004.
14. ¸gÀÙ³¡ª¿¾Ép¹º¥b¾ÉÅé¾Ç°|¥_°ÏIC³]pµu´Á½Òµ{pµe¥D«ù¤H Principal Investigator, Short courses for IC design, The Semiconuctor School in Northern Taiwan, Ministry of Economics Affairs, Taiwan, 2003-2004.
15. Ä³µ{©eû Technical Program Committee, The VLSI Design/CAD Symposium, Huai-Lien, Taiwan, August 2003.
16. Ä³µ{©eû Technical Program Committee, The VLSI Design/CAD Symposium, Tai-Tung, Taiwan, August 2002.
17. ±Ð¨|³¡¤K¤Q¤Kº[¤K¤Q¤E¾Ç¦~«×(²Ä¤@©M²Ä¤G©¡)¡u¤j¾Ç®Õ°|¿nÅé¹q¸ô¹q¸£»²§U³]p³nÅé»s§@ÄvÁÉ¡v©Ó¿ì¤H Chair, IC/CAD Contest, The Advisory Office, Ministry of Education, Taiwan, 2000 and 2001.
18. ¥Xª©¥D®u Publications Chair, The VLSI Design/CAD Symposium, Hsinchu, Taiwan, August 2001.
19. Ä³µ{©eû Technical Program Committee, Microprocessor Workshop, May 1999.