Physical Design for Nanometer ICs, Spring 2007
http://cc.ee.ntu.edu.tw/~ywchang/Courses/PD/pd.html
ANNOUNCEMENTS
- We will have a make-up class at 6:00pm on July 2.
- Handout #11 (Programming Assignment #2; June 2, 2007)
- Grading Information: Overall Score and Programming Assignment #1
- Slides on the 2007 MOE IC/CAD Contest: Problem A1, Problem B1, Problem B2, and Problem B3.
- "Physical design for modern VLSI design" in Essential Issues in SOC Design (Y.-L. Lin, Editors), Springer, 2006.
- "Packing floorplanning representations" to appear in Physical Design Handbook (C. Alpert, S. Sapatnekar, and Dinesh D. Mehta, Editors), CRC Press, 2007.
- Papers related to this course.
INSTRUCTOR: YAO-WEN CHANG
TEACHING ASSISTANT
HANDOUTS
- Handout #1 (Syllabus; March 6, 2007)
- Handout #2 (Turing Award Lecture on complexity; March 23, 2007)
- Handout #3 (Homework #1; April 4, 2007)
- Handout #4 (Programming Assignment #1; April 24, 2007)
- Handout #5 (Quiz #1; April 24, 2007)
- Handout #6 (Sample Solutions to Homework #1; April 30, 2007)
- Handout #7 (Sample Solutions to Quiz #1; April 30, 2007)
- Handout #8 (Homework #2; May 15, 2007)
- Handout #9 (Quiz #2; May 30, 2007)
- Handout #10 (Sample Solutions to Homework #2; June 2, 2007)
- Handout #11 (Sample Solutions to Quiz #2; June 2, 2007)
- Handout #12 (Programming Assignment #2; June 2, 2007)
- Handout #13 (Homework #3; June 2, 2007)
- Handout #14 (Practice Final Exam; June 18, 2007)
- Handout #15 (Sample solutions to HW#3; June 19, 2007)
- Papers related to this course.
- "Physical design for modern VLSI design" in Essential Issues in SOC Design (Y.-L. Lin, Editors), Springer, 2006.
- "Packing floorplanning representations" to appear in Physical Design Handbook (C. Alpert, S. Sapatnekar, and Dinesh D. Mehta, Editors), CRC Press, 2007.
- Handout #1 (Syllabus; March 6, 2007)
LECTURE NOTES
- Schedule:
- Introduction & algorithm paradigm
- Partitioning
- Floorplanning
- Placement
- Maze routing
- Global routing
- Detailed routing: full-chip routing and channel routing
- Specialized routing: clock routing, power/ground routing
- Post-layout optimization
- Signal/power integrity: noise modeling & optimization, IR drop
- Timing issues: timing modeling & optimization, performance-driven design
- Design for manufacturability & reliability: process variation, antenna effects, optical proximity correction, phase shift mask, redundant via, metal fill, electromigration, thermal issue, and more
- Lecture Note #1 (Introduction to VLSI design/styles and technology roadmap; March 7, 2007)
- Lecture Note #2 (Complexity & EDA paradigms; March 12, 2007)
- Lecture Note #3 (Circuit partitioning; March 12, 2007)
- Lecture Note #4 (Floorplanning; April 3, 2007)
- Lecture Note #5 (Placement; April 30, 2007)
- Lecture Note #6 (Global and maze routing; May 6, 2007)
- Lecture Note #7 (Detailed routing; May 15, 2007)
- Lecture Note #8 (Special net routing and performance optimization; May 15, 2007)
- Slides on the 2007 MOE IC/CAD Contest: Problem A1, Problem B1, Problem B2, and Problem B3.
ERRATA
PICTURES
Research Groups on Physical Design
Conferences Related to Physical Design
Journals related to Physical Design
OTHER INFORMATION
For any questions, send e-mails to ywchang@cc.ee.ntu.edu.tw.
Last modified: March 6, 2007