I Workshop on GSRC Bookshelf:
Defining CAD IP

November 20-21, 1999 UCLA

Technical Program

Day One

9:00 Opening (Andrew Kahng)
Data modelling
9:10-9:30 Nexsis CoBase and XML (Abdallah Tabbara)
9:30-10:00 Aspects of CHDStd, Nike, Genesis (Andrew Kahng)
10:00-11:00 Group Discussion:
- data modeling efforts for GSRC bookshelf
- define scope (beginning, end, level of detail)
- what aspects of synthesis can bookshelf cover in the near future?
- do we go down to GDS II?
- can we isolate physical design from logic synthesis?
Interchange Formats
11:00-11:30 Data formats for GSRC Bookshelf (Igor Markov)
11:30-12:30 Review of currently proposed data formats
- formats in the Fundamental slot
- formats in Partitioning and Placement Slots (Andy Caldwell)
- formats in other slots (John Lillis, Patrick Madden)
12:30-2:00 Lunch
2:00-2:45 Group Discussion:
- identifying a list of interchange format issues we need to fix
- spatial constraints, timing constraints, parasitics?
2:45-3:15 Timing constraints
3:45-4:45 Breakout Session
- smaller groups work on format definitions
- (i) spatial constraints, (ii) global routing, (iii) interconnect optimization
Bookshelf Slots
4:45-5:30 Software context and goals
Handout of Hylands/Reekie GSRC Software Day notes
Overview of software goals for Day 2
- conference call with Christopher Highlands
5:30-6:15 Block packing slot
- benchmarks, implementations, performance results
- interoperability flow w/Capo placer (Linda Wu, Shawn Zhang)


Clarifying software goals
- deliverables for bookshelf Slots (Igor Markov, Andy Caldwell)
10:00-1:00 Work on individual slots
2:00-4:00 Group synch-up, progress reports, return to slots...
4:00 Conclusions, summaries, action items

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